ITF World 2026: The Semiconductor Industry Enters a New Systems Era

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ITF World 2026: The Semiconductor Industry Enters a New Systems Era

ITF World 2026: The Semiconductor Industry Enters a New Systems Era

2026-07-13T07:51:30Z

AI, heterogeneous integration, silicon photonics, chiplets, and quantum computing are converging to define the next generation of complex systems.

For decades, semiconductor progress followed a familiar formula: shrink transistors, pack more of them onto a chip, and let Moore’s Law deliver the next generation of computing performance. That model remains important, but at imec’s ITF World 2026 conference in Antwerp, a different message emerged. The industry’s future may depend less on individual technologies and more on how they are integrated into increasingly complex systems.

AI is exposing bottlenecks that transistor scaling alone cannot solve. Compute performance now depends as much on memory bandwidth, interconnect efficiency, power delivery, thermal management, packaging, and software as it does on advances in logic. As a result, the semiconductor industry is beginning to rethink where scaling happens and how innovation is organized.

Across six articles, EE Times examines the major themes that emerged from ITF World 2026. In an

The package also examines one of AI’s most pressing challenges: moving data efficiently. Imec researchers describe a future in which optics moves ever closer to the processor, evolving from co-packaged optics to 2.5D and eventually 3D optical I/O. Finally, the series looks beyond AI to quantum computing, where advanced semiconductor manufacturing techniques are beginning to transform laboratory experiments into scalable, manufacturable systems.

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Taken together, these developments point toward a common conclusion. The semiconductor industry’s next chapter will not be defined by a single breakthrough technology. It will be shaped by the ability to integrate compute, memory, photonics, packaging, power delivery, and quantum technologies into coherent systems that can scale economically, efficiently, and sustainably.

Patrick Vandenameele, CEO of imec_landscape (Source imec)

Imec’s Patrick Vandenameele: Full-stack Innovation Is the Name of the Ga

As AI pushes semiconductors toward new limits in energy, memory, and interconnects, imec’s CEO says future progress will depend on deep co-optimization across the entire computing stack.

Chiplets, Ecosystems, and Europe’s Post-Fab Semiconductor Strategy

Chiplets, Ecosystems, and Europe’s Post-Fab Semiconductor Strategy

As AI drives semiconductor complexity beyond monolithic design, Europe sees its future competitiveness in chiplets, interoperability, and heterogeneous integration.

A technical graphic from Cadence Design Systems titled 'XTCO: Optimizing the Entire Technology Stack (Cross Technology Co-Optimization)' for HLSI. It displays a 3D exploded view of an advanced semiconductor package featuring AI chiplets, HBM stacks, a base die, and an interposer on a package substrate. Callout boxes highlight five optimization pillars: Fabric (Maximize data flow speed), Power (Minimize power loss), Thermal (Maximize TDP, shown with a heat map on the silicon), Compute (Maximize compute efficiency), and Memory (Maximize data flow efficiency).

Engineering Heterogeneity at Scale

As AI exposes the limits of traditional SoC architectures, the semiconductor industry is turning to heterogeneous integration, forcing changes in manufacturing, design tools, and system architecture.

CMOS 2.0 roadmap_Source imec

Beyond Chiplets, CMOS 2.0 Moves Scaling into the Circu

The next phase of 3D integration could depend on repartitioning circuits themselves, not just stacking finished dies or packaging larger functional blocks.

A close-up view of a semiconductor wafer with dark square dies bonded onto it, illuminated by vibrant blue, green, and pink light reflecting off the microchip circuitry

As AI Moves from Training to Inference, Optics Moves Closer to the Chip

Imec researchers argue that co-packaged optics will not be enough for future AI systems, pushing the industry toward 2.5D and eventually 3D optical I/O.

imec Array of qubits

Imec Pushes Quantum Toward Manufacturable Silicon Syste

Imec says advanced lithography and semiconductor integration techniques may help scale silicon spin qubits toward manufacturable quantum systems.

RELATED TOPICS: 3D ARCHITECTURES CMOS HETEROGENEOUS INTEGRATION ICS ITF WORLD LITHOGRAPHY OPTICS & PHOTONICS QUANTUM COMPUTING SEMICONDUCTORS

COMPANIES: IMEC

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Pat Brans is a contributing writer for EE Times and EE Times Europe. After a 22-year career in high tech, Brans embarked on a new mission as a freelance science and technology journalist. From his home in Grenoble, France, he maintains an extensive network that ranges from highly skilled scientists and technologists to C-level executives around the world. In the 15 years he has been writing professionally, Brans has interviewed over 1000 people and written over 1000 articles. Brans has also taught classes at both graduate and undergraduate levels at Grenoble École de Management and has authored two books: "Master the Moment: Fifty CEOs Teach You the Secrets of Time Management" and "Mobilize Your Enterprise: Achieving Competitive Advantage through Wireless Technology."